A resistive memory element is typically characterized by the capability of assuming one of two distinct resistance states at any one time. Data is stored in the element based on the resistance state of the element. Typically, a logic “1” is characterized by a high resistance, while a logic “0” is characterized by a low resistance.
A typical resistive memory element is an anti-fuse memory element. An anti-fuse memory element, as the name implies, functions in an opposite manner to a fuse. An anti-fuse element normally has a very high resistance, typically an open circuit, unless and until a program voltage is applied to the element. When a sufficient voltage is applied to an anti-fuse memory element, the element breaks down and the resistance of the element is reduced to a very low resistance, typically a short circuit. Like a blown fuse, once an anti-fuse memory element is shorted, it is typically impossible or impractical to cause it to open again. Therefore, anti-fuse memory elements are typically referred to as a write-once memory elements, or one-time programmable (OTP) memory elements.
Resistive memory elements are typically arranged in a memory array formed by a plurality of conductive traces arranged in rows and columns. The conductive traces extending along the rows of the array are generally referred to as “word lines” and the conductive traces extending along the columns of the array are generally referred to as “bit lines.” The word lines and bit lines are typically oriented in an orthogonal relationship to each other. A resistive memory element is formed at each intersection (i.e., cross-point) of a word line and a bit line.
Resistive memory devices are typically formed using integrated circuit processing techniques employing various combinations of material depositions, shape definitions using photolithography, and material removal (etches), as known to persons skilled in the art. As noted above, arrays of resistive memory devices are typically formed by arranging a plurality of generally parallel word lines in a generally orthogonal relationship with a plurality of generally parallel bit lines. Each of the word lines is of a generally uniform width, as is each bit line.
The word lines are typically formed by depositing a layer of a metal conductor material, followed by a photolithography step to define the width of the lines and the distances between the conductors, followed by an etch step to remove the conductor material from the spaces between the lines. The bit lines are typically formed in the same fashion, and then are disposed orthogonally to the word lines. Since a resistive memory device, such as an anti-fuse, is formed at each intersection of a word line and a bit line, it is desirable to configure the widths of the word lines and bit lines as narrowly as possible to increase the density of resistive memory devices in an array.
The amount of voltage required to “write to,” or program, a memory element depends on the thickness of the barrier layer. Therefore, in order to lower the required current or voltage, the thickness of the barrier layer must normally be reduced.
Therefore, it can be seen that it is desirable to have methods and devices for reducing the amount of voltage to program a memory element without increasing the potential of encountering shorts within the element.